Problem!!! Boot File has no valid signature!!!

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Steve6n2
Beiträge: 2
Registriert: Mittwoch 21. Juni 2006, 20:55

Problem!!! Boot File has no valid signature!!!

Beitrag von Steve6n2 »

Hi Leute, ich will bei meiner Nokia DBox2 2xIntel ein neues Image aufspielen, aber es funktioniert nicht!!!

Protokoll vom Bootmanager:

debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB

debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-a7.85.06.07.00.00-8e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.5.88, My IP 192.168.5.5
debug: Sending TFTP-request for file C/flash/ppcboot
will verify ELF image, start= 0x800000, size= 222280
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000


ppcboot 0.6.4 (Jul 12 2001 - 02:51:28)

Initializing...
CPU: PPC823ZTnnA at 68 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Sil


Danke
Steve
Nachtvogel
Tuxboxer
Tuxboxer
Beiträge: 4391
Registriert: Freitag 21. Mai 2004, 17:16

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