Hi@ All!!
Nachdem ich meine Nokia 2xI avia 600 Sat in den Debug nach MHC versetzt habe und sie nun neu resette,kommt erst 1 sek starte betaresearch und dann die debuganzeige!!
flashen ist gar nicht möglich! bekomme das image nicht drauf!!
Der Log sieht so aus!!
}debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: autoboot aborted from terminal
dbox2:root> reset
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 169.254.219.147, My IP 169.254.219.146
debug: Sending TFTP-request for file C/PROGRAMME/DBOXBOOT/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 169.254.219.147, My IP 169.254.219.146
debug: Sending TFTP-request for file C/PROGRAMME/DBOXBOOT/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 169.254.219.147, My IP 169.254.219.146
debug: Sending TFTP-request for file C/PROGRAMME/DBOXBOOT/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 169.254.219.147, My IP 169.254.219.146
debug: Sending TFTP-request for file C/PROGRAMME/DBOXBOOT/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-8d.69.06.07.00.00-0c
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: autoboot aborted from terminal
dbox2:root>
kann mir da jemand etwas zu sagen!!!
Danke mkheinz
Nach debug kein flashen möglich!!!
-
mkheinz
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DieMade
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mkheinz
- Interessierter
- Beiträge: 47
- Registriert: Montag 3. März 2003, 13:28
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DieMade
- Oberlamer, Administrator & Supernanny
- Beiträge: 10532
- Registriert: Samstag 13. Juli 2002, 10:49